Semiconductor nonvolatile memory
US5589700A · kind A · utility
8Cited by
1References
3Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 28, 1994 |
| Grant date | Dec 31, 1996 |
| Priority date | — |
| Expiry date | Feb 28, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor nonvolatile memory comprised of a p-type silicon substrate 3, an n.sup.+ drain 5 and an n.sup.+ source 9, the source and the drain regions defining an MOS channel region 7. On top of the channel region 7 there are laminated a silicon dioxide film 18 and a semiconductor rich oxide film 20 which has been nitrided so as to leave silicon nitride region therein. Further on top of these layers, there is formed a polysilicon film 22, which is etched to form a control electrode. By using the memory cell and appropriate select transistors, a semiconductor nonvolatile memory (EPROM) is constructed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.