Method and apparatus for emulating a high capacity DRAM
US5590071A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 16, 1995 |
| Grant date | Dec 31, 1996 |
| Priority date | — |
| Expiry date | Nov 16, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for emulating a high storage capacity DRAM component. The emulation involves the use of a component containing multiple DRAMs, each having a lower storage capacity than that of the emulated DRAM, but having a cumulative storage capacity greater than or equal to that of the DRAM being emulated. Emulation entails the decoding of extra bits in an address signal from a controller for the high capacity DRAM to direct the output of DRAM control signals from a decoder to the multiple DRAM component so as to activate only one of the plurality of lower density DRAMs therein. Advantageously, the invention may be implemented so as to permit migration to a next generation DRAM device without altering wiring on the printed circuit board or changing the memory controller used to access the DRAM component.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.