Integrated circuit interface to control bus with either of two different protocol standards
US5592633A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 6, 1994 |
| Grant date | Jan 7, 1997 |
| Priority date | — |
| Expiry date | Apr 6, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4068
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
While employing the same number of dedicated pins of an IC, a self-configurable interface circuit between a control bus and the IC recognizes whether the IC is being used in a system employing an SPI or a I2CBUS protocol for the transmission to the IC of control signals through the bus. The interface circuit employs an "inner" SPI interface standard block, to a third input of which either a true CE (chip-enable) signal coming from a third wire of the bus or a virtual CE signal that is self-generated by the interface circuit in case of operation in an I2CBUS environment, is fed. The third (ADDR) pin of the IC may be connected to the CE wire of the bus in case of an SPI application or it may be biased at the supply or ground voltage for selecting one or the other of two internal addresses of the IC, when functioning in an I2CBUS environment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.