Stabilized power converter having quantized duty cycle
US5594324A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 31, 1995 |
| Grant date | Jan 14, 1997 |
| Priority date | — |
| Expiry date | Mar 31, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A multi-slice power converter (10) employs a digital circuit (22) to generate phase-delayed pulse width modulated (PWM) signals, which results in the duty cycle of the PWM signals having only a certain number of possible values. The quantization of the duty cycle is shown to result in two types of instabilities which are unique to power converters having a digital control loop, in addition to the conventional analog-type of instabilities. This invention provides novel methods and apparatus for stabilizing the digital control loop of the power converter through the use of a periodic dither signal having a frequency that is less than the PWM frequency and greater than a bandwidth frequency of the converter. The dither signal functions to effectively increase the number of possible duty cycles by a factor given by the ratio of the dither frequency to the bandwidth frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.