Patent · US Expired

Arbitration protocol for a bidirectional bus for handling access requests to a logically divided memory in a multiprocessor system

US5594876A · kind A · utility

62Cited by

20References

9Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Klaus J. Getzlaff · Schenefeld, DE
Udo Wille · Holzgerlingen, DE

Key dates

Filing date	Jul 27, 1995
Grant date	Jan 14, 1997
Priority date	—
Expiry date	Jul 27, 2015

Classification

Technology area (CPC G)Physics
CPC primaryG06F13/368
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

The invention concerns a multiprocessor system comprising processors PU0 to PUn and a common main memory. The memory is logically divided into at least two banks M0 and M1 and is interconnected with the processors by a bus 110. By means of control lines 111 to 118 a bus protocol is established so that one of said memory banks is accessed while another one of said banks is still busy.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.