Apparatus and method for aligning data transferred via DMA using a barrel shifter and a buffer comprising of byte-wide, individually addressabe FIFO circuits
US5594927A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 15, 1994 |
| Grant date | Jan 14, 1997 |
| Priority date | — |
| Expiry date | Sep 15, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4018
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for transferring data via DMA in data processing system from a host system to a transmission network. The transferred data is in longword format in which each longword consists of four bytes. Within a longword, valid bytes intended for transmission are contiguous. The adapter or I/O device includes a packet memory and a FIFO circuit interposed between the host system and packet memory to allow for differences in access speed of a host memory and the packet memory. The FIFO circuit contains four discrete FIFO circuits that are separately addressable for writing the bytes of each longword received from the host memory for storage in the FIFO circuit. The received longword is applied to a barrel shifter which aligns the first valid byte in the received longword with the one of the four discrete FIFO circuits containing a first available storage location at a current FIFO longword address. A FIFO control circuit receives information describing the number of valid bytes in the received longword and generates a control signal to control the barrel shifter and FIFO address signals to cause the valid bytes of the received longword to be stored in contiguous byte pos…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.