Feedback shift register for generating digital signals representing series of pseudo-random numbers
US5596617A · kind A · utility
7Cited by
4References
6Claims
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Key dates
| Filing date | Sep 12, 1995 |
| Grant date | Jan 21, 1997 |
| Priority date | — |
| Expiry date | Sep 12, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2207/583
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A feedback shift register for generating digital signals representing pseudo-random number sequences has n-stages and exclusive OR-circuits in the feedback logic, as well as a clock-pulse generator. To be able to generate digital signals, which are well suited for a further digital processing, the clock-pulse generator (17) is linked with the n-stages (11, 12, 13, 14, 15) of the shift register (10) via a controllable gate circuit (18), which blocks one clock pulse of 2.sup.n clock pulses (CLK) of the clock-pulse generator (17) in each case.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.