Reduction of the probability of interlevel oxide failures by minimization of lead overlap area through bus width reduction
US5598057A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 13, 1995 |
| Grant date | Jan 28, 1997 |
| Priority date | — |
| Expiry date | Mar 13, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2329/00
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A field emission display apparatus is comprised of an emitter plate 2 comprising a plurality of column conductors 9 intersecting a plurality of row conductors 6, and electron emitters 5 at the intersection of each of the row and column conductors. An anode plate 62 is adjacent to the emitter plate 2, the anode plate 62 comprising conductive stripes 50 which are alternately covered by material luminescing in the three primary colors. The conductive stripes 50 covered by the same luminescent material are electrically interconnected to form comb-like structures corresponding to each of the colors. The anode plate 62 contains an active region 58 and the buses 82, 84, 86 have a non-uniform width.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.