Computer system resilient to a wide class of failures
US5598529A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 3, 1995 |
| Grant date | Jan 28, 1997 |
| Priority date | — |
| Expiry date | Apr 3, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/182
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
This invention includes a consensus protocol, a broadcast protocol and a fault tolerant computer system created by using the two protocols together in combination. The protocols and system use the minimum number of processors to create a system tolerant of concurrent processor crash and byzantine failures. The protocols are subject to certain validity conditions. The system in the state of consensus is guaranteed to have all non-faulty processors in agreement as to what action the system should take. The system and protocols can tolerate up to t total number of processor failures, no more than b of which may fail in the byzantine mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.