Optimizing compiler which generates multiple instruction streams to be executed in parallel
US5598561A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 24, 1992 |
| Grant date | Jan 28, 1997 |
| Priority date | — |
| Expiry date | Jul 24, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/456
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a compiler which produces an object program from a source program, the automatic parallelization unit is comprised of the parallelizing intermediate code detection unit which detects an intermediate code convertible to other intermediate codes each providing the same result of operation but cannot be determined as to whether the execution of one of the intermediate codes will terminate more quickly than the others without being executed, and the intermediate code parallelizing conversion unit which converts to an intermediate code that executes the converted intermediate code and the original intermediate code in parallel, stops the execution of the other intermediate codes when one of them has terminated execution before the other, and executes return to the original execution control.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.