Method and apparatus for reducing interference in a pin array
US5600259A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 9, 1996 |
| Grant date | Feb 4, 1997 |
| Priority date | — |
| Expiry date | Feb 9, 2016 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB33Y80/00
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A multi-pin probe including a printed circuit board with multiple electrically conductive vias, multiple probes, each probe inserted into one of the electrically conductive vias, and a housing having multiple cavities inserted over the multiple probes, each cavity having a first and a second aperture around one of the probes, the first aperture being smaller than the second aperture. In addition, a method of manufacturing a multi-pin probe including the steps of manufacturing a printed circuit board with multiple electrically conductive vias, inserting multiple probes into the electrically conductive vias, and inserting a housing having multiple cavities over the multiple probes, each cavity having a first and a second aperture around one of the probes, the first aperture being smaller than the second aperture.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.