Apparatus and method for a NMOS redundancy fuse passgate circuit using a VPP supply
US5600277A · kind A · utility
16Cited by
2References
13Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 9, 1995 |
| Grant date | Feb 4, 1997 |
| Priority date | — |
| Expiry date | May 9, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/693
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A redundancy passgate circuit is implemented in NMOS technology in order to provide a more rapid transmission of the transmitted signals. The circuit provides for the more rapid signal transmission by reducing the capacitance experienced by the input signals. The reduced capacitance loading is achieved at the expense of a greater layout area and a requirement for an on-chip power supply.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.