Mask design
US5601687A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 11, 1995 |
| Grant date | Feb 11, 1997 |
| Priority date | — |
| Expiry date | Sep 11, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/978
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A device and a method to minimize leakage current between adjacent sections of a semiconductor device, while minimizing topographic variations. The device has an etched shape of a diamond, with an unetched "moat" in its center. While any type of etch will work, wet etching is usually used, both for its low cost and its good sidewell smoothness. Prior designs typically have a simple straight line (T-shape) across. The etching has general application to wafer fabrication of opto-electronic devices requiring good electrical isolation, and using self-aligned or planarization processing in later process step which require minimal topographic variations. More generally, the design technique can be applied to any etched semiconductor device where topographic variation needs to be minimized while using wet etching or other crystallographic etches. The novel features include the elimination of any lines along the 011 crystallographic axis (which give retrograde slopes in wet etching) and the use of an "island-to-fill-in" feature, and minimize volume of absorbed resists.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.