Galois field polynomial multiply/divide circuit and a digital signal processor incorporating same
US5602767A · kind A · utility
7Cited by
5References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 29, 1995 |
| Grant date | Feb 11, 1997 |
| Priority date | — |
| Expiry date | Aug 29, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/151
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The multiply/divide circuit uses an exclusive OR function of an ALU in a DSP. The result of the exclusive OR function through accumulators and shift registers which recycle the shifted signals back to the ALU, can be made to perform the multiply or divide function. When used in a DSP for telecommunication purposes, the multiply/divide circuit can perform convolution encoding and cyclic redundancy check, among other functions, specifically for the telecommunication application.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.