High speed bidirectional signaling scheme
US5604450A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 27, 1995 |
| Grant date | Feb 18, 1997 |
| Priority date | — |
| Expiry date | Jul 27, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/026
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In a computer system having multiple components, a bidirectional scheme which allows bidirectional data communications between components over a single wire without using termination resistors by placing two drivers from two corresponding processor cores on the same wire, and allowing simultaneous data transfer in two directions. This doubles the effective bandwidth per pin without requiring a modification to the clocking scheme of the system. The driver is impedance matched to the line, and used as the termination for the driver on the opposite end of the wire. This reduces the termination power, since no power is consumed when both drivers are in the same state. The bidirectional flow of data creates a ternary encoding, with a relatively simple decoding possible.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.