UART emulator card
US5604870A · kind A · utility
Inventors
Key dates
| Filing date | Aug 1, 1994 |
| Grant date | Feb 18, 1997 |
| Priority date | — |
| Expiry date | Aug 1, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/105
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An interface device (102) and corresponding method for coupling a peripheral controller (117) to a host computer (100), the interface device including an emulated universal asynchronous receiver transmitter (UART) (113) for the host computer. The interface device further includes a plurality of registers (203), preferably a control (215), status (227), and data register, such as a multi-register data buffer (401), corresponding to the registers of a UART, a host computer port (112), preferably compatible with a PCMCIA standard, that includes an address map for the plurality of registers (203), a peripheral controller port (114) providing an address mapped parallel interface to the plurality of registers (203), and control logic (207) for providing status signals, including UART status signals, to the host computer port and to the peripheral controller port. The interface device may further include a pacing circuit (303) for substantially emulating, preferably dependent on a baud rate of the data information, the timing limitations of the UART.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.