Patent · US Expired

Two-line mixed analog/digital bus system and a master station and a slave station for use in such system

US5604918A · kind A · utility

15Cited by
6References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 3, 1994
Grant dateFeb 18, 1997
Priority date
Expiry dateJun 3, 2014

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L25/4902
  • WIPO fieldTelecommunications
  • WIPO sectorElectrical engineering

Abstract

A two-line multi-station bus system has a clock wire and a data wire and supports selective slave station addressing by a prevalent master station for thereupon eliciting a bitwise clocked data transfer between the clocking master station and an addressed and clocked slave station. Moreover, the system supports analog signal transfer in that the prevalent master station has a holding member for while eliciting the analog signal from the actual addressed slave station holding said clocking through carrying the clock wire at a predetermined binary value. The analog signal is received until changeover of the clock wire to a binary value other than the predetermined binary value a particular version the analog signal is pulse width modulated in combination with associate delimiting signals on the clock wire sent by the transmitter station that is not necessarily the master station.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.