Method and circuit for detecting a fault in a clock signal for microprocessor electronic devices including memory elements
US5606531A · kind A · utility
3Cited by
4References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 31, 1995 |
| Grant date | Feb 25, 1997 |
| Priority date | — |
| Expiry date | Mar 31, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/0793
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic device including a microprocessor, a circuit generating a clock signal, and memories of both the volatile type and the non-volatile type, incorporates a circuit for generation of a reset signal capable of detecting a stop in the oscillation of said clock signal and generating a logic signal coupled with the reset input of the microprocessor. The circuit monitors the clock signal applied to the device and, if an irregularity is detected, generate a reset signal holding the microprocessor in a safe state. The reset signal is held until the circuit generating the clock signal resumes normal operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.