Structure and method for virtual-to-physical address translation in a translation lookaside buffer
US5606683A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 28, 1994 |
| Grant date | Feb 25, 1997 |
| Priority date | — |
| Expiry date | Jan 28, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/681
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A structure and a method are provided in a table lookaside buffer (TLB) for translating a virtual memory address to a physical memory address. The virtual memory address is computed by adding to a base address an offset value. In the TLB of the present invention, each entry of the TLB is stored a previous base address, a partial sum of the previous virtual memory address computation, the sign bit of the previous offset value, and the value of the carry bit at the position of the sign bit of the previous offset value in the previous virtual memory address computation. The present invention is especially applicable to a data TLB used in conjunction with a two-way set associative data cache memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.