Binary programmable current mirror
US5608348A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 22, 1996 |
| Grant date | Mar 4, 1997 |
| Priority date | — |
| Expiry date | May 22, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/265
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A programmable current mirror circuit suitable for incorporation into circuit designs and programmably tailored to produce a ratio of current output over current input based upon the status of a plurality of binary weighted switches. The resulting circuit is readily tailored so as to be insensitive to the "on" characteristics of the switches. Alternatively, the switches may comprise transistors controlled by accompanying circuitry operable to produce an equivalent switching function. An input current divider circuit network formed from an array of current mirrors fractionally divides an input current into a plurality of equivalent currents. A binary weighting circuit receives such fractional input currents, and applies a binary weight to each of same. A voltage to current converter receives the binary weighted voltage and converts the voltage to a weighted output current proportional to the input current directly in relation to the binary weighting applied via the binary weighting circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.