High speed transport system
US5608757A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 3, 1994 |
| Grant date | Mar 4, 1997 |
| Priority date | — |
| Expiry date | Jun 3, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/45
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A high speed signal transport system (10) provides data transmission across a balanced channel (14). The balanced channel (14) carries differential signals from the output of a differential transmitter (12). An equalizer (18) compensates for distortion in the balanced channel in order to reduce timing jitter of the signal. The signal is applied to the input of a differential receiver (20) which exploits the precise quantization threshold inherent in differential data to accurately convert the signal to digital data. The differential receiver (20) also employs a known frequency reference along with digital transition detection to rephase the digital data to the local clock. No duty-cycle limitation is placed on the signal carried by the balanced channel (14) and therefore the differential transmitter (12) and differential receiver (20) are not required to encode the signal. Because the signal-to-noise ratio seen by the differential receiver (20) is ample for accurate quantization, the equalizer (18) is optimized for jitter reduction in order to obviate the need for analog retiming circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.