Method and apparatus for mapping data of a 2-dimensional space from a linearly addressed memory system
US5608888A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 1994 |
| Grant date | Mar 4, 1997 |
| Priority date | — |
| Expiry date | Aug 26, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/70
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A 2-dimensional display space is mapped into the external DRAM addresses by embedding in the address space X and Y vectors of the display space. The mapping of the X and Y vectors allows a macroblock of pixels to be stored in one DRAM memory page, so that an access to a macroblock can be efficiently accomplished under a page mode access to the DRAM page. By providing control to one address bit, data of four pixels can be obtained at one time in one of 2 pixel.times.2 pixel "quad pixel" configuration, or in a 4 pixel.times.1 pixel horizontal "scan" configuration. In addition, a structure and a method are provided for accessing a 16.times.16-pixel picture area in two parts, in order that the number of DRAM page boundaries crossed during access of the 16.times.16-pixel picture area is minimized, thereby increasing the efficiency of memory access by reducing the overhead cost of initial accesses under page mode access to DRAMs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.