Asynchronous low latency data recovery apparatus and method
US5610953A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 21, 1995 |
| Grant date | Mar 11, 1997 |
| Priority date | — |
| Expiry date | Mar 21, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04Q11/0066
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A receiver device is provided with a low latency recovery apparatus for recovering serially transmitted digital data. The receiver device operates asynchronously in respect to a transmitting device. The low latency recovery apparatus synchronizes the receiver device in one clock time to support throughput of high speed transmission messages received from interconnection networks or interface cables. A metastability proof latch is provided. A synchronization method provides individual alignment for each incoming message. There is instantaneous response to back-to-back messages from different sources. Synchronization is accomplished in the receiving device by implementing a clocking system capable of generating N phase-shifted clocks all operating at the same frequency as the incoming data. The N clocks are shifted an approximately equal amount in relation to each other. The data recovery apparatus selects the one of N clocks which is best in synchronization with the incoming serial data and then to receive the message correctly. The apparatus has a two wire interface for serial data and a bracketing control signal. Serial data is synchronized first to the selected clock and then to …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.