Dynamic MOSFET threshold voltage controller
US5612645A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 1, 1995 |
| Grant date | Mar 18, 1997 |
| Priority date | — |
| Expiry date | Dec 1, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/205
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A threshold voltage controller circuit for controlling the threshold voltage of complementary metal oxide semiconductor field effect transistors (CMOSFETs) integrated within an integrated circuit includes a test circuit, a clocked voltage comparator and voltage ramp generator. The test circuit simulates a critical signal path within the integrated circuit by receiving a first clock signal and providing in response thereto a corresponding delayed version of such clock signal. The clocked voltage comparator compares the voltage of the delayed clock signal output from the test circuit with a reference voltage and, in response to a second clock signal which is delayed with respect to the first clock signal, asserts a binary output signal high or low if the clock delay introduced by the test circuit is higher or lower, respectively, than desired. The voltage ramp generator, in response to the binary output signal from the clocked voltage comparator, generates an increasing or decreasing voltage ramp which is applied to the semiconductor substrate and well of the integrated circuit for increasing or decreasing the back bias thereto, thereby increasing or decreasing the threshold voltages…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.