Data transmission system having dedicated clock channel
US5612681A · kind A · utility
6Cited by
14References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 20, 1994 |
| Grant date | Mar 18, 1997 |
| Priority date | — |
| Expiry date | Jul 20, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N7/17318
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The clock demodulator 25 continually demodulates the clock signal of the control CPU 7 transmitted from the clock modulator 10 of the center S. The terminal control CPU 23 performs processes such as transmission and reception of data with the demodulated clock signal as a reference clock. The time required to synchronize the clocks of the CPUs 7 and 23 is eliminated. Transmission and reception of data is executed quickly as soon as right of transmission is transferred to a terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.