Laminated module for stacking integrated circuits
US5613033A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 18, 1995 |
| Grant date | Mar 18, 1997 |
| Priority date | — |
| Expiry date | Jan 18, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15312
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An interconnect system is provided in which one or more laminated modules embodying electrical devices can be stacked in a three dimensional configuration upon a printed circuit board. One or more electrical devices is surface mounted to a recessed area at the upper surface of each laminated module, and each laminated module includes male pins and female sockets. The male pins can be releasibly engaged within sockets upon a printed circuit board. Additionally, the male pins of one laminated module can be engaged within female sockets of another laminated module in building-block fashion. Conductive paths are formed entirely through the laminated module between respective sockets and pins. The conductive paths are arranged in a less dense fashion than bond locations adjacent each electrical device. The bond locations are therefore offset from conductive paths to provide fan-out and redistribution features.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.