Patent · US Expired

High-speed semiconductor integrated circuit device composed of CMOS and bipolar transistors

US5614848A · kind A · utility

12Cited by
19References
2Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 7, 1995
Grant dateMar 25, 1997
Priority date
Expiry dateJun 7, 2015

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K19/0136
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

The semiconductor IC device has a circuit arrangement in which one or more of the circuits, such as on a single substrate, include a totem-pole series connection of bipolar transistors which are driven by arrangements of complementary MOS circuits in a manner such that high-speed logic/switching operation is effected. Arrangements of circuits can also be effected in which the totem-pole series connection is constituted by a PNP transistor, on the power source terminal side, and an NPN or NMOS transistor on the ground or pull-down side thereof. With such configurations, the output signal swing at low operating voltages can be maximized while achieving the same with reduced propagation delay time and low power consumption. The device can also be implemented by circuitry employing capacitance bootstrapping effect as well as IIL (I.sup.2 L) design schemes.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.