Sample/hold circuit having an analog-to-digital converter and a nonvolatile memory for storing hold voltage data in digital form
US5614854A · kind A · utility
4Cited by
16References
7Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 28, 1995 |
| Grant date | Mar 25, 1997 |
| Priority date | — |
| Expiry date | Aug 28, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C27/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A sample/hold circuit which receives a voltage level at the input terminal thereof at a specific timing, and outputs the received voltage level in the form of a hold voltage. The sample/hold circuit includes an analog-to-digital converter for receiving a voltage level at the input terminal thereof, a memory element for storing the received voltage level in the form of hold voltage data, and a digital-to-analog converter for outputting the hold voltage data. The sample/hold circuit may be fabricated into a one-chip integrated circuit. The memory element may be a nonvolatile and reprogrammable memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.