Method and system which selectively uses different levels of error correction to achieve high data throughput
US5615221A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 7, 1995 |
| Grant date | Mar 25, 1997 |
| Priority date | — |
| Expiry date | Jun 7, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/0045
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An inexpensive, high performance error detecting and correcting system capable of handling multiple errors with high throughput. Digital data is provided to a reconfigurable decoder which is initially set for a low level of correction and a high throughput. On detection of an error, a signal is generated which is used to dynamically reconfigure the decoder. The decoder is reconfigured at a higher correction level. The data is then reprocessed through the reconfigured decoder. In a specific implementation, the invention uses a Blahut decoder. N and K values to reconfigure the decoder are provided by a microprocessor. The invention contemplates use of an encoder operating at the highest level of correction required. Use of an initial low level of correction provides for a high throughput. Reconfigurability allows for high corrective power and associated lower throughput only when necessary.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.