System and method for debugging a computing system
US5615331A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 23, 1994 |
| Grant date | Mar 25, 1997 |
| Priority date | — |
| Expiry date | Jun 23, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3698
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for debugging a development computing system is disclosed. The BIOS in the development system includes a debug engine. Interrupt-handling macros in BIOS include an entry macro to direct debug output codes (e.g., port 80 and beep codes) to the debug engine. A near entry macro is added to BIOS-segment macros (e.g., F000 segment) which provides the offset of the debug engine. A far entry macro is added to non-BIOS-segment macros which provides the segment and offset of the debug engine. The debug engine sends the output codes to a remote host computer via a communication channel (e.g., a bi-directional parallel port) on the development system. The debug engine also saves the contents of various registers on the development system to the host computer. Thus, the invention can be used in a stackelss environment. Debug commands (e.g., memory dump, set break address) can be issued from the host computer to the development system via the communications channel. Such commands are executed on the development system in accordance with program instructions in the debug engine. Debug data associated with the development system may be sent to the host computer via the communi…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.