Flow control with smooth limit setting for multiple virtual circuits
US5617409A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 28, 1994 |
| Grant date | Apr 1, 1997 |
| Priority date | — |
| Expiry date | Jan 28, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5681
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A flow control system is disclosed, for a transmitting node and a receiving node. The transmitting node and the receiving node are linked together through multiple connections or virtual circuits. A flow control circuit in the transmitting node limits the number of data transmission units transmitted from the transmitting station, and not yet copied out of the receive buffers in the receiving node, to the total number of receive buffers in the receiving node. The flow control circuit in the transmitting node further controls the transmission of data transmission units on the multiple connections fairly, such that all connections are provided a proportional amount of the total available receive buffers in the receiving node. In an example embodiment, a global counter is used to maintain the total number of receive buffers containing data in the receiving node, and a global limit register contains the maximum number of receive buffers containing data in the receiving node allowed for a single connection. The flow control circuit further includes logic providing fair and efficient allocation of receive buffers across all virtual circuits between a transmitting node and a destination n…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.