Storage device array architecture with copyback cache
US5617530A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 27, 1995 |
| Grant date | Apr 1, 1997 |
| Priority date | — |
| Expiry date | Dec 27, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2211/1059
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A fault-tolerant storage device array using a copyback cache storage unit for temporary storage. When a Write occurs to the RAID system, the data is immediately written to the first available location in the copyback cache storage unit. Upon completion of the Write to the copyback cache storage unit, the host CPU is immediately informed that the Write was successful. Thereafter, further storage unit accesses by the CPU can continue without waiting for an error-correction block update for the data just written. In a first embodiment of the invention, Read-Modify-Write operations are performed during idle time. In a second embodiment of the invention, normal Read-Modify-Write operation by the RAID system controller continue use Write data in the controller's buffer memory. In a third embodiment, at least two controllers, each associated with one copyback cache storage unit, copy Write data from controller buffers to the associated copyback cache storage unit. If a copyback cache storage unit fails, more than one controller share a single copyback storage unit. In a fourth embodiment, Write data is copied from a controller buffer to a reserved area of each storage unit comprising the …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.