Arbitration circuit capable of changing the priority and arrival time of nonselected requests
US5617545A · kind A · utility
17Cited by
5References
8Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Jun 9, 1993 |
| Grant date | Apr 1, 1997 |
| Priority date | — |
| Expiry date | Jun 9, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/36
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A parallel computer network wherein an arbitration circuit for performing arbitrating operation over a plurality of processing requests at the same time at high speed is provided in a crossbar network control circuit to thereby prevent the processing requests not selected from being kept awaited for a long time. The arbitration circuit includes a priority bit change circuit which has a plurality of adders for adding a preset value to the priority information of the each awaited processing request and also has a plurality of comparators for detecting the requests being awaited.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.