System and method to prevent the occurrence of a snoop push during read and write operations
US5617556A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 16, 1995 |
| Grant date | Apr 1, 1997 |
| Priority date | — |
| Expiry date | Aug 16, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0835
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method are provided which include devices implementing a snooping protocol. Data to be written by an I/O peripheral to an I/O controller is mapped to a specific location in memory, and then the data is actually written to an L1 cache in the controller by the I/O device. During this period when the I/O device is writing to the controller cache, the controller does not actually own the data stored in the specific memory location. Once the write operation is complete for a given memory sector, the I/O controller then performs the bus operations required to obtain ownership of the data in the specified memory location. The data read from memory is then merged with the data written from the I/O device and written back to the memory. If a snoop hit is identified by the I/O controller, during the period when the data is owned the I/O controller intervenes to prevent the memory access which caused the snoop hit. The invention limits the time period in which a snoop hit can occur to only those times when the device owning the data is already in the process of performing an atomic Read-Modify-Write operation such that reordering of queued bus transaction operations is never requ…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.