System for reducing power consumption in computers
US5617572A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 19, 1996 |
| Grant date | Apr 1, 1997 |
| Priority date | — |
| Expiry date | Jun 19, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system for reducing the amount of power consumed by a battery operated computer device is disclosed. A microcontroller continuously monitors the activity of at least one I/O device and sets an activity state variable (ASV) associated with the I/O device accordingly. Upon each the expiration of a preselected time period, the microcontroller examines the state of the ASV to determine whether the I/O device was active during the expired time period. If so, the I/O device is caused to operate in a full power mode; otherwise, the I/O device is caused to operate in a reduced power consumption mode. In one embodiment, the I/O device is capable of operating in more than one reduced power consumption mode, in which case, responsive to a determination that the I/O device was not active during the expired time period, the I/O device is caused to operate in the next lowest power consumption mode. In an alternative embodiment, the frequency with which timer interrupts are generated is automatically adjusted after the expiration of each time period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.