Method for reducing temporal artifacts in digital video systems
US5619228A · kind A · utility
92Cited by
3References
5Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 5, 1996 |
| Grant date | Apr 8, 1997 |
| Priority date | — |
| Expiry date | Jun 5, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0266
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method and system for improved display of digital video data. The data is arranged into bit plies according to the binary weight of each bit per pixel. The bit planes are then translated into non-binary weighted bit planes by bit translation circuitry (22). These non-binary bit planes are transmitted to the activation circuitry of a spatial light modulator array (30), such that each non-binary bit is displayed at symmetrical times around at least one predetermined point within a video frame time, eliminating visual artifacts associated with binary pulse-width modulation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.