Semiconductor memory with non-volatile memory transistor
US5621683A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 5, 1995 |
| Grant date | Apr 15, 1997 |
| Priority date | — |
| Expiry date | Dec 5, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B20/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
With a semiconductor memory cell (particularly but not exclusively in a thin-film device) having a non-volatile memory transistor (Tm) as a driver transistor, an adequate difference in output signal (I) can be derived from the cell for the different states of the memory transistor (in spite of poor transistor characteristics,) thereby permitting the assembly of a large number of such memory cells in an array (100). Each memory cell includes a load (TI) driven by the non-volatile memory transistor (Tm). In the different memory states of the memory transistor (Tm) a difference in signal occurs at a node (30) between the memory transistor (Tm) and the load (TI). Each cell also includes a switch (To) which is coupled to the node (30) and switched from one output state to another by the signal at the node (30). The output state of the switch (To) provides the output signal (I) from the cell. Such an arrangement permits the memory transistor (Tm) and the output switch (To) to be optimized for their respective memory function and output function. The memory transistor may be of the dielectric-storage type (MNOST) or of the floating-gate type. In a thin-film circuit memory, the output swit…
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