Method and apparatus for synchronizing parallel data transfer
US5621774A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 28, 1994 |
| Grant date | Apr 15, 1997 |
| Priority date | — |
| Expiry date | Nov 28, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0337
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A data transfer apparatus includes a transmitting apparatus having a pulse generation circuit for generating a plurality of data and a clock having a predetermined timing relation to the plurality of data, a receiving apparatus having latch circuits supplied with the clock and data for latching the plurality of data at a timing of the clock, respectively, transmission lines for connecting the transmitting apparatus and the receiving apparatus, a variable delay circuit for delaying the clock or data to be supplied to the latch circuits, and a variable delay control circuit for controlling an amount of delay of the variable delay circuit by means of output signals of the latch circuits to thereby minimize the cycle time of the data and clock in the data transfer between apparatuses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.