Multiple-bit random access memory cell
US5623440A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 13, 1995 |
| Grant date | Apr 22, 1997 |
| Priority date | — |
| Expiry date | Apr 13, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/565
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An improved multi-bit memory cell includes a storage capacitor and a switching element coupled to one of the terminals of the capacitor. The switching element includes a first switching component having a positive threshold, and a complementary switching component having a negative threshold. Because the switching element is constructed in this manner, noise generation caused by activation of the switching components is significantly reduced, and cut-off effects are eliminated. Both of these factors contribute to the memory cell's ability to store more bits of information than prior art memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.