Method and apparatus for determining an integer power of a floating point number
US5623527A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 30, 1996 |
| Grant date | Apr 22, 1997 |
| Priority date | — |
| Expiry date | Jan 30, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F17/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatus for determining an integer power of a floating point number includes a shift register, a register file having a partial product register and a binary power register, a multiplier coupled to the register file for performing floating point multiply operations and a state machine for controlling the shift register, the register file and the multiplier. The state machine controls loading of initial values into the shift register and into the partial product register and the binary power register. The state machine controls execution of an integer power routine in which a new partial product value is determined by multiplying the contents of the partial product register by the contents of the binary power register if the LSB of the shift register is a 1. The partial product value is left unchanged if the LSB of the shift register is a 0. A new binary power value is determined by multiplying the contents of the binary power register by itself. Then the contents of the shift register are shifted one bit to the right, and the integer power routine is repeated until all bits in the shift register are 0's.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.