Method for decoding sequences of guest instructions for a host computer
US5623617A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 7, 1995 |
| Grant date | Apr 22, 1997 |
| Priority date | — |
| Expiry date | Jun 7, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/45508
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Emulator performance can be improved by recognizing repeated sequences of the same instruction, or commonly groups of instructions. For example, it is very common to see a three instruction sequence of MOVEM, UNLK A6, and RTS instructions for a 68020 processor in procedure exit code. By looking for these sequences, and combining the operations performed by the separate sequences, overhead of decoding and dispatching the individual instructions in the sequence can be eliminated, and performance improved. Common instruction sequences or repeated sequences in a guest program are detected during emulation of the guest program on a host processor, and performance of the emulation optimized based on the detected sequences. Thus, the emulation logic comprising host instructions embedded within a particular emulation program for a particular guest instruction, detects a particular sequence of guest instructions and in response to detection of the particular sequence bypasses the dispatch logic for guest instructions within the particular sequence. The sequences detected can comprise repeated guest instructions, or common sequences of two or more than two guest instructions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.