Parallel processing system including instruction processor to execute instructions and transfer processor to transfer data for each user program
US5623688A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 28, 1995 |
| Grant date | Apr 22, 1997 |
| Priority date | — |
| Expiry date | Aug 28, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/17
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A parallel processing system including a plurality of processing units each having a main storage storing instructions and data, an instruction processor reading the instructions from the main storage and executing the instructions, and a transfer processor for making a data transfer in units of a packet which is made up of a header and body data. The parallel processing system further includes a network coupling two processing units which are to make the data transfer based on information included in the header of the packet, where the header includes information related to at least a destination of the data, an attribute of a memory access to the main storage and a length of the data. The transfer processor carries out a parallel process for each user process by making a data transfer between the main storage and the network in units of the packet depending on the attribute of the memory access. The transfer processor of at least an arbitrary one of the processing units includes a managing part for managing for each user process a transfer queue base address indicating a first address of a transfer queue in the main storage, a transfer queue write pointer indicating to which data…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.