Method and apparatus for presenting an access request from a computer system bus to a system resource with reduced latency
US5625778A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 3, 1995 |
| Grant date | Apr 29, 1997 |
| Priority date | — |
| Expiry date | May 3, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1642
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system has a system resource, such as a frame buffer, coupled to a system bus, the system bus conveying a request for access to the system resource from another system element connected to the system bus. An apparatus for presenting the access request to the system resource from the system bus includes a queue, a multiplexor that is preferably glitchless, and a controller. The queue has an input for receiving access request information from the system bus; one or more storage elements, each for storing access request information, wherein the one or more storage means are connected to form a queue having a head and a tail; and a queue output for supplying data stored in the head of the queue. The multiplexor has a first input coupled to the queue output, a second input for receiving the access request information from the system bus, and a multiplexor output for supplying the access request to the system resource. The controller is coupled to the queue and to the multiplexor, for initiating the loading of the access request information into the queue, and for initially causing the multiplexor to supply, at the multiplexor output, the access request information from the second inpu…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.