Transfer request queue control system using flags to indicate transfer request queue validity and whether to use round-robin system for dequeuing the corresponding queues
US5625846A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 14, 1993 |
| Grant date | Apr 29, 1997 |
| Priority date | — |
| Expiry date | Dec 14, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/17
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A transfer request queue control system for a parallel computer system includes a plurality of processing units each having a main storage storing instructions and data. An instruction processor reads the instructions from the main storage and executes the instructions. A transfer processor performs data transfers in packets, each comprising a header and body data and each data transfer comprising one or more packets. A network couples transmitting and receiving processing units, which are to perform a data transfer based on information included in the header of each packet, the header information being related to a destination of the data, an attribute of a memory access to the main storage and a length of the data. The transfer processor performs parallel processing by making a data transfer between the main storage and the network in successive packets, depending on the attribute of the memory access. The transfer processor of one of the processing units comprises a transfer request queue comprising a list of headers of respective packets corresponding to each of plural requested data transfers, a managing part for managing a transfer queue valid flag which indicates validity of…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.