Electronic digital clock distribution system
US5627482A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 7, 1996 |
| Grant date | May 6, 1997 |
| Priority date | — |
| Expiry date | Feb 7, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/10
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
More particularly, an electronic digital clock distribution system provides a plurality of working rank clock signals to respective ones of a plurality of logic circuits. Each clock signal has a predetermined frequency and each logic circuit requires a working rank clock signal having a predetermined level of electrical power. An oscillator produces a master clock signal at the predetermined frequency and at an electrical power level at least equal to the sum of the power requirements for all working rank clock signals of the plurality of logic circuits. An electronic splitter network is connected to the oscillator to splitting the master clock signal into the plurality of working rank clock signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.