Emitter coupled logic circuit with MOS differential stage
US5627483A · kind A · utility
1Cited by
8References
34Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 30, 1995 |
| Grant date | May 6, 1997 |
| Priority date | — |
| Expiry date | Aug 30, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/09448
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A logic circuit has at least one first differential stage made of bipolar transistors operating in linear mode. The first differential stage is connected in a branch of a second differential stage biased by a current source. The second stage and the current source are made of MOS transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.