Convolutional digital to analog converter
US5627538A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 4, 1995 |
| Grant date | May 6, 1997 |
| Priority date | — |
| Expiry date | Jan 4, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/662
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A convolutional digital to analog converter (CDAC) according to the present invention enables to apply the convolution operation between the digital input signals and the Fourrier transform of a filtering transfer function. This convolution operation is combined with interleaved sampling performed by a clock splitter and also a multiplier generator device. In more details, the present convolutional DAC comprises a device splitting the incoming data for deserializing them and for sorting and storing the data in the respective N data buffers, a device splitting the clock signal (Fb) of the CDAC into N signals having a frequency equal to Fb/N clocking the respective data buffer, N multiplying DAC receiving data from the corresponding data buffer through a corresponding data bus, and N multiplier generators using identical periodic functions and being shifted by a delay respective to each other according to the clock splitter for generating the function to be convoluted with the digital inputs in the respective multiplying DACs. Second and third order for which N is equal to 1 and 2 of the convolutional DAC according to the present invention are described in detail in the description.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.