Semiconductor memory device having cylindrical capacitors
US5629539A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 8, 1995 |
| Grant date | May 13, 1997 |
| Priority date | — |
| Expiry date | Mar 8, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/66
Abstract
A semiconductor memory device comprises a semiconductor substrate, a plurality of memory cells including a plurality of MOS transistors, each having a source, a drain and a gate, and a plurality of capacitors formed on the semiconductor substrate in a matrix manner, an interlayer insulating film formed on the memory cells and having a plurality of openings selectively formed, a plurality of plug electrodes formed in the openings of the interlayer insulating film, a plurality of bit lines, each bit line being connected to one of the source and the drain of each of the MOS transistors through a corresponding one of the plug electrodes, and a plurality word lines, each word line being the gate of each of the MOS transistors. The capacitors each comprise a storage node electrode having a cylindrical portion layered on another one of the source and the drain of each of the MOS transistors, a capacitor dielectric film formed on the storage node electrode, and a plate electrode formed to be opposed to at least the storage node electrode interposing the capacitor dielectric film therebetween. The bit lines are formed on the interlayer insulating film and connected to the upper surface of t…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.