Dual threshold current mode digital PWM controller
US5629610A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 8, 1995 |
| Grant date | May 13, 1997 |
| Priority date | — |
| Expiry date | May 8, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/1563
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A fully digital, current mode, PWM control is realized by employing two distinct comparators, both reading the voltage drop on a sensing resistance. The first comparator exerts an open-loop current mode control. The second comparator, establishing a second higher current threshold than the current threshold set by the first comparator, triggers a disabling circuit of the output power transistor for a preset period of time, when the current level through the output stage uncontrollably rises beyond the second threshold. This may occur because of an insufficient discharge from the load circuit inductance during off-phases of the output power transistor of the extra energy stored during switching delay periods of the first (open loop control) comparator. The frequency of the sequence of bursts may be precisely controlled to be well outside the frequency range of interest to prevent disturbances.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.