Fully differential output CMOS power amplifier
US5631606A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 1, 1995 |
| Grant date | May 20, 1997 |
| Priority date | — |
| Expiry date | Aug 1, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45424
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A fully differential output CMOS power amplifier suitable to be used in a non-volatile memory mixed mode chip for voice record and playback to drive a very low impedance load such as an 8 ohm speaker from a low voltage power supply. This fully differential CMOS power amplifier utilizes a voltage multiplying technique for the input stage, a level shift/gain stage, and a common mode feedback network. It also utilizes native n-MOS having a threshold voltage VT.apprxeq.0v for the folded cascode differential input, native n-MOS (VT.apprxeq.0v) for the source follower output stage, enhancement n-MOS (VT.apprxeq.0.7 v) for the common source output, and a voltage regulator using p-MOS diode connected devices for simulating a resistor divider to regulate the voltage multiplier output. The amplifier also includes a mechanism for crossover distortion reduction at the output driver stage, and a scheme to set the idle current in the output driver n-MOS transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.